Senior Analog Design Engineer
Mulya Consulting
3 – 8 yrs Hyderabad
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1. Senior Analog Ckt Design Engineers for Hyderabad locations with 4 years of experience.
Job Description:

” M.Tech with 4 years of experience , in SoC design for low noise applications
” Should have very good knowledge of impact of layout parasitic and post layout simulations
” Hand-on experience in architecture evaluation, circuit level design and simulations of analog blocks
” Should have worked block level end to end delivery and chip level integration experience is preferred
” Silicon proven design is advantage
” Hand on experience with Cadence Virtuoso Tools
” Application domain : Camera application , low noise & Large die
Role:
1. Design of various low noise circuits like Bias blocks, Low noise amplifiers, Column ADCs (single/dual slop).
2. Design of BGB , Bias , Ramp Gen , PoR, DAC by using 2nd order compensation techniques.
3. Integration of various blocks and interconnects and work closely with lead to achieve
desired performance
3. Provide inputs for layout and work closely with layout to meet desired performance
4. Knowledge in Pixel performance matrix should be advantage
5. Strong written and verbal communication skills
6. Should be capable of working independently with minimal guidance.

Company:
We are a product based fab less VLSI Company, with expertise in the mixed signal custom chip development and specialized in the development of ROIC & Imaging sensors for custom needs. We are presently focusing on development of various advance imaging sensor for very niche applications and looking for the digital design engineer who can take a lead and effectively contribute to the development.